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Showing results 22 to 24 of 24

22
Skewed Flip-Flop and Mixed-V-t Gates for Minimizing Leakage in Sequential Circuits

Seomun, Jun; Kim, Jae-Hyun; Shin, Young-Soo, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.27, pp.1956 - 1968, 2008-11

23
TSUNAMI: Triple Sparsity-Aware Ultra Energy-Efficient Neural Network Training Accelerator With Multi-Modal Iterative Pruning

Kim, Sangyeob; Lee, Juhyoung; Kang, Sanghoon; Han, Donghyeon; Jo, Wooyoung; Yoo, Hoi-Jun, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.69, no.4, pp.1494 - 1506, 2022-04

24
예측 가능 환경에서 제약된 메모리를 이용한 디스크와 프로세서의 실시간 동시 스케줄링 기법 = A real-time co-scheduling method of a disk and a processor by using limited memory in a predictable environmentlink

정다운; Jung, Da-Woon; et al, 한국과학기술원, 2004

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