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Low voltage design of pipeline architecture through one-cycle correction of timing errors = 단일 사이클 페널티를 갖는 타이밍 오류 정정 기법을 이용한 저전압 파이프라인 아키텍처 설계link Shin, In-Sub; 신인섭; et al, 한국과학기술원, 2014 |
Low Voltage Operating Field Effect Transistors with Composite In2O3-ZnO-ZnGa2O4 Nanofiber Network as Active Channel Layer Choi, Seung-Hoon; Jang, Bong-Hoon; Park, Jin-Seong; Demadrille, Renaud; Tuller, Harry L.; Kim, Il-Doo, ACS NANO, v.8, no.3, pp.2318 - 2327, 2014-03 |
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