Browse by Author Hyung-Cheol Shin
Showing results 34 to 63 of 63
| Gate Oxide Damage by Plasma Oxide Deposition and Via RIE Hyung-Cheol Shin, American Vacuum Society Plasma Etch 1992 Symposium, 1992 |
| Impact of Plasma Charging Damage and Diode Protection on Scaled Thin Oxide Hyung-Cheol Shin, IEDM Technical Digest, pp.467 - 470, 1993 |
| Integrity of Gate Oxide on TFSOI Materials Hyung-Cheol Shin, Proc. IEEE International SOI Conference, pp.22 - 23, 1995 |
| Lateral Silicon Field Emission Devices using Electron Beam Lithography Hyung-Cheol Shin, Micoroprocesses and Nanotechnology'99, pp.134 - 135, 1999 |
| Materials, Device and Gate Oxide Integrith Evaluation of Simox and Bonded SOI Wafers Hyung-Cheol Shin, Proc. IEEE International SOI Conference, pp.143 - 145, 1995 |
| MOS Memory Using Si Nanocrystals Formed by Wet Etching of Poly-Silicon Along Grain Boundaries Hyung-Cheol Shin, 2000 Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp.221 - 224, 2000 |
| On the large-signal CMOS modeling and parameter extraction for RF applications Hyung-Cheol Shin, SISPAD 2002, pp.67 - 70, SISPAD, 2002-09 |
| P-channel Nano Crystal Memory Hyung-Cheol Shin, 2000 China-Korea Joint Symposium on Semiconductor Physics and Device Application, pp.19 - 19, 2000 |
| Partially Depleted SOI NMOSFET's with Self-Aligned Polysilicon Gate Formed on the Recessed Channel Region Jong-Ho Lee; Hyung-Cheol Shin; Jong-June Kim; Choon-Bae Park; Young-June Park, IEEE ELECTRON DEVICE LETTERS, v.18, no.5, pp.184 - 186, 1997-05 |
| Physical Modeling of Substrate Resistance in RF MOSFETs Hyung-Cheol Shin, Workshop on Compact Modeling at the 5th International Conference on Modeling and Simulation of Microsystems, pp.335 - 338, 2003 |
| Physical RF modeling of Junction Varactors Hyung-Cheol Shin, SSDM 2002, pp.418 - 419, 2002 |
| Plasma-Etching induced Damage to Thin Oxide Hyung-Cheol Shin, IEEE/SEMI Advanced Semiconductor Manufacturing Conference, pp.79 - 83, 1992 |
| PMOS-based Si Nano-crystal Memory Hyung-Cheol Shin, Silicon nanoelectronics workshop, pp.10 - 11, 1999 |
| Process-Induced Charging Damage in PETEOS for Interlevel Dielectric Applications Hyung-Cheol Shin, International Symposium on Plasma Process-Induced Damage, pp.109 - 112, 1996 |
| Programming and Erasing Characteristics of P-channel Nano-crystal Memory Hyung-Cheol Shin, Semicon Korea Technical Symposium 2000, pp.5 - 10, 2000 |
| Quantized Canductance of a Gate-All-Around Silicon Quantum Wire Transistor Hyung-Cheol Shin, MNC(Microprocesses and Nanotechnology Conference, pp.150 - 151, 1998 |
| Recessed Channel(RC) SOI NMOSFET's with Self-Aligned Polysilicon Gate Formed on the RC Region Hyung-Cheol Shin, Proc. IEEE International SOI Conference, pp.122 - 123, 1996 |
| RF characteristics of 30 nm MOSFETs with non-overlapped source-drain to gate Hyung-Cheol Shin, Silicon Nanoelectronics Workshop 2002, 2002 |
| Silicon MOS Memory with self-aligned Quantum Dot on Narow Channel Hyung-Cheol Shin, ICVC99, pp.187 - 189, 1999 |
| Silicon nano-crystal memory with tunneling nitride Hyung-Cheol Shin, International Conference on Solid State Devices and Materials, pp.170 - 171, 1998 |
| Sub 4-nm Polyoxide Using ECR(Electron Cyclotron Resonance) N2O Plasma Oxidation Hyung-Cheol Shin, 2000 Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices, pp.25 - 30, 2000 |
| TFSOI Complementary BiCMOS Technology for Low Power RF Mixed-Mode Applications Hyung-Cheol Shin, IEEE Custom Integrated Circuits Conference, pp.35 - 38, 1996 |
| The P-Channel Si Nano-Crystal Memory Hyung-Cheol Shin, ICSICT 2001, pp.200 - 204, ICSICT, 2001-10 |
| Thickness and Other Defects on Oxide and Interface Reliability due to Plasma Processing Hyung-Cheol Shin, Proc. IEEE International Reliability Phys. Symp., pp.272 - 279, 1993 |
| Thin Oxide Damage by Plasma Etching and Ashing Processes Hyung-Cheol Shin, Proc. IEEE International Reliability Phys. Symp., pp.37 - 41, 1992 |
| Transient Behaviors in Partially Depleted Thin Film SOI Devices Hyung-Cheol Shin, Proc. IEEE International SOI Conference, pp.4 - 6, 1995 |
| Two Band Tunneling Currents in Dual-Gate CMOSFET with Ultrathin Gate Oxide Hyung-Cheol Shin, ICSMM 2000, pp.108 - 109, 2000 |
| Ultra thin oxide grown on polysilicon by ECR(Electron Cyclotron Resonance) N2O Plasma Hyung-Cheol Shin, 5th International Symposium on Plasma Process-Induced Damage 2000, no.2000, pp.133 - 136, 2000 |
| Ultra thin polyoxide grown by ECR(Electron Cyclotron Resonance) N2O Plasma Han, S.Y.; Lee, J.H.; Hyung-Cheol Shin, ELECTRONICS LETTERS, v.36, no.4, pp.361 - 362, 2000-02 |
| Ultrathin Oxide Grown on Polysilicon by Using an Electron Cyclotron Resonance N2O Plasma Han, S.Y.; Hyung-Cheol Shin, JOURNAL OF THE KOREAN PHYSICAL SOCIETY, v.37, no.6, pp.893 - 896, 2000-12 |
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- 34,015 2020 - 2024
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- 75,680 2000 - 2009
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