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Yoo, Hoi-Jun (유회준)
교수, (전기및전자공학부)

http://ssl.kaist.ac.kr

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    NO Title, Author(s) (Publication Title, Volume Issue, Page, Issue Date)
    1
    Scaling-CIM: eDRAM In-Memory-Computing Accelerator With Dynamic-Scaling ADC and Adaptive Analog Operation

    Kim, Sangjin; Um, Soyeon; Jo, Wooyoung; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.59, no.8, pp.2694 - 2705, 2024-08

    2
    A 92 fps and 2.56 mJ/Frame Computing-In-Memory-Based Human Pose Estimation Accelerator With Resource-Efficient Macro for Mobile Devices

    Kwon, Beomseok; Li, Zhiyong; Kim, Sangjin; et al, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.71, no.6, pp.2921 - 2925, 2024-06

    3
    An 2.31uJ/Inference Ultra-Low Power Always-on Event-Driven AI-IoT SoC With Switchable nvSRAM Compute-in-Memory Macro

    Sang, Haoyang; Xie, Wenao; Park, Gwangtae; et al, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.71, no.5, pp.2534 - 2538, 2024-05

    4
    A 8.81 TFLOPS/W Deep-Reinforcement-Learning Accelerator With Delta-Based Weight Sharing and Block-Mantissa Reconfigurable PE Array

    An, Sanghyuk; Ryu, Junha; Park, Gwangtae; et al, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.71, no.5, pp.2529 - 2533, 2024-05

    5
    An Overview of Computing-in-Memory Circuits With DRAM and NVM

    Kim, Sangjin; Yoo, Hoi-Jun, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.71, no.3, pp.1626 - 1631, 2024-03

    6
    A Low-Power Artificial-Intelligence-Based 3-D Rendering Processor With Hybrid Deep Neural Network Computing

    Han, Donghyeon; Ryu, Junha; Kim, Sangyeob; et al, IEEE MICRO, v.44, no.1, pp.17 - 27, 2024-01

    7
    COOL-NPU: Complementary Online Learning Neural Processing Unit

    Kim, Sangyeob; Kim, Soyeon; Hong, Seongyon; et al, IEEE MICRO, v.44, no.1, pp.28 - 37, 2024-01

    8
    MetaVRain: A Mobile Neural 3-D Rendering Processor With Bundle-Frame-Familiarity-Based NeRF Acceleration and Hybrid DNN Computing

    Han, Donghyeon; Ryu, Junha; Kim, Sangyeob; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.59, no.1, pp.65 - 78, 2024-01

    9
    DynaPlasia: An eDRAM In-Memory Computing-Based Reconfigurable Spatial Accelerator With Triple-Mode Cell

    Kim, Sangjin; Li, Zhiyong; Um, Soyeon; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.59, no.1, pp.102 - 115, 2024-01

    10
    C-DNN: An Energy-Efficient Complementary Deep-Neural-Network Processor With Heterogeneous CNN/SNN Core Architecture

    Kim, Sangyeob; Kim, Soyeon; Hong, Seongyon; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.59, no.1, pp.157 - 172, 2024-01

    11
    C-DNN V2: Complementary Deep-Neural-Network Processor With Full-Adder/OR-Based Reduction Tree and Reconfigurable Spatial Weight Reuse

    Kim, Sangyeob; Yoo, Hoi-Jun, IEEE JOURNAL ON EMERGING AND SELECTED TOPICS IN CIRCUITS AND SYSTEMS, v.13, no.4, pp.1026 - 1039, 2023-12

    12
    Neuro-CIM: ADC-Less Neuromorphic Computing-in-Memory Processor With Operation Gating/Stopping and Digital-Analog Networks

    Kim, Sangyeob; Kim, Sangjin; Um, Soyeon; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.58, no.10, pp.2931 - 2945, 2023-10

    13
    SNPU: An Energy-Efficient Spike Domain Deep-Neural-Network Processor With Two-Step Spike Encoding and Shift-and-Accumulation Unit

    Kim, Sangyeob; Kim, Sangjin; Um, Soyeon; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.58, no.10, pp.2812 - 2825, 2023-10

    14
    A Mobile 3-D Object Recognition Processor With Deep-Learning-Based Monocular Depth Estimation

    Im, Dongseok; Park, Gwangtae; Li, Zhiyong; et al, IEEE MICRO, v.43, no.3, pp.74 - 82, 2023-05

    15
    An Efficient Deep-Learning-Based Super-Resolution Accelerating SoC With Heterogeneous Accelerating and Hierarchical Cache

    Li, Zhiyong; Kim, Sangjin; Im, DongSeok; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.58, no.3, pp.614 - 623, 2023-03

    16
    DSPU: An Efficient Deep Learning-Based Dense RGB-D Data Acquisition With Sensor Fusion and 3-D Perception SoC

    Im, Dongseok; Park, Gwangtae; Ryu, Junha; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.58, no.1, pp.177 - 188, 2023-01

    17
    A 23-mu W Keyword Spotting IC With Ring-Oscillator-Based Time-Domain Feature Extraction

    Kim, Kwantae; Gao, Chang; Graca, Rui; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.57, no.11, pp.3298 - 3311, 2022-11

    18
    Energy-Efficient DNN Training Processors on Micro-AI Systems

    Han, Donghyeon; Kang, Sanghoon; Kim, Sangyeob; et al, IEEE Open Journal of the Solid-State Circuits Society, v.2, pp.259 - 275, 2022-11

    19
    FlashMAC: A Time-Frequency Hybrid MAC Architecture With Variable Latency-Aware Scheduling for TinyML Systems

    Gweon, Surin; Kang, Sanghoon; Kim, Kwantae; et al, IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.57, no.10, pp.2944 - 2956, 2022-10

    20
    A 36.2 dB High SNR and PVT/Leakage-Robust eDRAM Computing-In-Memory Macro With Segmented BL and Reference Cell Array

    Ha, Sangwoo; Kim, Sangjin; Han, Donghyeon; et al, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.69, no.5, pp.2433 - 2437, 2022-05
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