Researcher Page

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Shin, Youngsoo (신영수) C-1621-2011

Department
School of Electrical Engineering(전기및전자공학부)
Website
http://dtlab.kaist.ac.kr/HomePage
Research Area
VLSI CAD, Low-power, DFM (Design for Manufacturability), Computational Lithography, Neuromorphic circuit

Keyword Cloud

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1

OWARU: free space-aware timing-driven incremental placement with critical path smoothing

Jung, Jinwook; Nam, Gijoon; Reddy, Lakshmi; et al, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.37, no.9, pp.1825 - 1838, 2018-09

2

Electrothermal Analysis With Nonconvective Boundary Conditions

Choi, Suhyeong; Shim, Seongbo; Shin, Youngsooresearcher, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, v.65, no.8, pp.1044 - 1048, 2018-08

3

Folded circuit synthesis: min-area logic synthesis using dual-edge-triggered flip-flops

Han, Inhak; Shin, Youngsooresearcher, ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, v.23, no.5, pp.61:1 - 61:21, 2018-08

4

Recap of the 23rd Asia and South Pacific Design Automation Conference (ASP-DAC)

Shin, Youngsooresearcher, IEEE DESIGN & TEST, v.35, no.3, pp.100 - 101, 2018-05

5

Memory-efficient parametric semi-global matching

Lee, Yeong Min; Park, Min Gyu; Hwang, Youngbae; et al, IEEE SIGNAL PROCESSING LETTERS, v.25, no.2, pp.194 - 198, 2018-02

6

Module grouping to reduce the area of test wrappers in SoCs

Kim, Sang-Min; Shin, Youngsooresearcher, INTEGRATION-THE VLSI JOURNAL, v.60, pp.39 - 47, 2018-01

7

Fast Verification of Guide-Patterns for Directed Self-Assembly Lithography

Shim, Seongbo; Shin, Youngsooresearcher, IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, v.36, no.9, pp.1522 - 1531, 2017-09

8

Machine Learning-Guided Etch Proximity Correction

Shim, Seongbo; Shin, Youngsooresearcher, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.30, no.1, pp.1 - 7, 2017-02

9

Lithography Defect Probability and Its Application to Physical Design Optimization

Shim, Seongbo; Chung, Woohyun; Shin, Youngsooresearcher, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.25, no.1, pp.271 - 285, 2017-01

10

Reliable Memristive Switching Memory Devices Enabled by Densely Packed Silver Nanocone Arrays as Electric -Field Concentrators

You, Byoung Kuk; Kim, Jong Min; Joe, Daniel J.; et al, ACS NANO, v.10, no.10, pp.9478 - 9488, 2016-10

11

Synthesis of Dual-Mode Circuits Through Library Design, Gate Sizing, and Clock-Tree Optimization

Kim, Sangmin; Kang, Seokhyeong; Shin, Youngsooresearcher, ACM TRANSACTIONS ON DESIGN AUTOMATION OF ELECTRONIC SYSTEMS, v.21, no.3, 2016-07

12

Wakeup scheduling and its buffered tree synthesis for power gating circuits

Kim, Sangmin; Paik, Seungwhun; Kang, Seokhyeong; et al, INTEGRATION-THE VLSI JOURNAL, v.53, pp.157 - 170, 2016-03

13

Light Interference Map: A Prescriptive Optimization of Lithography-Friendly Layout

Shim, Seongbo; Choi, Suhyeong; Shin, Youngsooresearcher, IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, v.29, no.1, pp.44 - 49, 2016-02

14

One-Cycle Correction of Timing Errors in Pipelines With Standard Clocked Elements

Shin, Insup; Kim, Jae Joon; Lin, Yu Shiang; et al, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.24, no.2, pp.600 - 612, 2016-02

15

An Analytical Approach to Thermal Design and Optimization With a Temperature-Dependent Power Model

Shim, Seongbo; Lee, Jae Wook; Shin, Youngsooresearcher, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.62, no.3, pp.816 - 824, 2015-03

16

Aggressive Voltage Scaling Through Fast Correction of Multiple Errors With Seamless Pipeline Operation

Shin, In-Sup; Kim, Jae-Joon; Shin, Youngsooresearcher, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.62, no.2, pp.468 - 477, 2015-02

17

Topology-oriented pattern extraction and classification for synthesizing lithography test patterns

Shim, Seongbo; Shin, Youngsooresearcher, JOURNAL OF MICRO-NANOLITHOGRAPHY MEMS AND MOEMS, v.14, no.1, 2015-01

18

Simplifying Clock Gating Logic by Matching Factored Forms

Han, Inhak; Shin, Youngsooresearcher, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, v.22, no.6, pp.1338 - 1349, 2014-06

19

HAPL: Heterogeneous Array of Programmable Logic Using Selective Mask Patterning

Shin, Youngsooresearcher; Shin, In-Sup; Baek, Donkyu; et al, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.61, no.1, pp.146 - 159, 2014-01

20

ACCURATE GATE DELAY EXTRACTION FOR TIMING ANALYSIS OF BODY-BIASED CIRCUITS

Baek, Donkyu; Shin, Insup; Shin, Youngsooresearcher, JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, v.22, no.8, 2013-09

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