Polysilicon Channel TFT With Separated Double-Gate for Unified RAM (URAM)Unified Function for Nonvolatile SONOS Flash and High-Speed Capacitorless 1T-DRAM

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dc.contributor.authorHan, Jin-Wooko
dc.contributor.authorRyu, Seong-Wanko
dc.contributor.authorKim, Dong-Hyunko
dc.contributor.authorChoi, Yang-Kyuko
dc.date.accessioned2013-03-09T17:32:55Z-
dc.date.available2013-03-09T17:32:55Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2010-03-
dc.identifier.citationIEEE TRANSACTIONS ON ELECTRON DEVICES, v.57, no.3, pp.601 - 607-
dc.identifier.issn0018-9383-
dc.identifier.urihttp://hdl.handle.net/10203/97004-
dc.description.abstractUnified random access memory (URAM) with a separated double-gate is demonstrated on a fully depleted polysilicon (poly-Si) thin-film-transistor (TFT) template. Integration of a front-gate dielectric of tunneling oxide/nitride/control oxide (O/N/O) and a floating poly-Si channel provides the two versatile functions of nonvolatile silicon oxide-nitride oxide-semiconductor Flash memory and high-speed capacitorless single-transistor 1T-DRAM in a single transistor. In this design, the memory mode of URAM is selected according to user specifications. As the back-channel is assigned for capacitorless 1T-DRAM while the front-channel is devoted for Flash memory, spatial separation minimizes undesired soft programming in the front O/N/O layer and allows for capacitorless 1T-DRAM operation irrespective of the data state of the nonvolatile memory. This feature presents interference-free operation between the two modes. In addition, the virtue of the TFT process allows the potential for stackable memory for ultra-high-density era.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectURAM-
dc.subjectNVM-
dc.titlePolysilicon Channel TFT With Separated Double-Gate for Unified RAM (URAM)Unified Function for Nonvolatile SONOS Flash and High-Speed Capacitorless 1T-DRAM-
dc.typeArticle-
dc.identifier.wosid000274993100008-
dc.identifier.scopusid2-s2.0-77649191261-
dc.type.rimsART-
dc.citation.volume57-
dc.citation.issue3-
dc.citation.beginningpage601-
dc.citation.endingpage607-
dc.citation.publicationnameIEEE TRANSACTIONS ON ELECTRON DEVICES-
dc.identifier.doi10.1109/TED.2009.2038584-
dc.contributor.localauthorChoi, Yang-Kyu-
dc.contributor.nonIdAuthorRyu, Seong-Wan-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorCapacitorless 1T-DRAM-
dc.subject.keywordAuthorFlash memory-
dc.subject.keywordAuthornonvolatile memory (NVM)-
dc.subject.keywordAuthorseparated double-gate-
dc.subject.keywordAuthorsilicon oxide-nitride oxide-semiconductor (SONOS)-
dc.subject.keywordAuthorthin-film transistor (TFT)-
dc.subject.keywordAuthorunified random access memory (URAM)-
dc.subject.keywordPlusURAM-
dc.subject.keywordPlusNVM-
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