Lanthanum-Oxide-Doped Nitride Charge-Trap Layer for a TANOS Memory Device

Abstract

A charge-trap-type Flash memory with a La(2)O(3)-doped Si(3)N(4) charge-trapping layer is demonstrated for the first time. An ultrathin La(2)O(3) layer is inserted in the middle of a Si(3)N(4) layer, followed by high-temperature annealing to mix the two layers. The La(2)O(3)-doped Si(3)N(4) layer, irrespective of Si(3)N(4) deposition processes, is found to provide deep charge-trapping sites, resulting in an excellent pre-/postcycling retention property and high reliability. The optimization of the La(2)O(3) layer thickness and position in the Si(3)N(4) trapping layer has been also systematically studied.