Lanthanum-Oxide-Doped Nitride Charge-Trap Layer for a TANOS Memory Device

Cited 1 time in webofscience Cited 0 time in scopus
  • Hit : 268
  • Download : 4
A charge-trap-type Flash memory with a La(2)O(3)-doped Si(3)N(4) charge-trapping layer is demonstrated for the first time. An ultrathin La(2)O(3) layer is inserted in the middle of a Si(3)N(4) layer, followed by high-temperature annealing to mix the two layers. The La(2)O(3)-doped Si(3)N(4) layer, irrespective of Si(3)N(4) deposition processes, is found to provide deep charge-trapping sites, resulting in an excellent pre-/postcycling retention property and high reliability. The optimization of the La(2)O(3) layer thickness and position in the Si(3)N(4) trapping layer has been also systematically studied.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2011-10
Language
English
Article Type
Article
Keywords

NONVOLATILE MEMORY; ELEVATED-TEMPERATURES; RELIABILITY; RETENTION

Citation

IEEE TRANSACTIONS ON ELECTRON DEVICES, v.58, no.10, pp.3314 - 3320

ISSN
0018-9383
URI
http://hdl.handle.net/10203/95692
Appears in Collection
EE-Journal Papers(저널논문)
Files in This Item
This item is cited by other documents in WoS
⊙ Detail Information in WoSⓡ Click to see webofscience_button
⊙ Cited 1 items in WoS Click to see citing articles in records_button

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0