DC Field | Value | Language |
---|---|---|
dc.contributor.author | Huang, Min Li | ko |
dc.contributor.author | Lee, Jin | ko |
dc.contributor.author | Setiawan, Hendra | ko |
dc.contributor.author | Ochi, Hiroshi | ko |
dc.contributor.author | Park, Sin Chong | ko |
dc.date.accessioned | 2013-03-09T05:47:07Z | - |
dc.date.available | 2013-03-09T05:47:07Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2010 | - |
dc.identifier.citation | IEICE TRANSACTIONS ON COMMUNICATIONS, v.E93B, no.4, pp.948 - 960 | - |
dc.identifier.issn | 0916-8516 | - |
dc.identifier.uri | http://hdl.handle.net/10203/95519 | - |
dc.description.abstract | With the growl g demand for high-performance in applications over wireless channels. we need to develop a Medium Access Control (MAC) system that supports high throughput and quality of service enhancements This paper presents the standard analysis, design architecture and design Issues leading to the implementation of an IEEE 802 11e based MAC system that supports MAC throughput of over 100 Mbps In order to meet the MAC layer tinting constraints. a hardware/software co-design approach is adopted The proposed MAC architecture is implemented on the Minx Vutex-II Pro Field-Programmable Gate Array (FPGA) (XC2VP70-511704C) prototype. and connected to a host computer through an external Universal Serial Bus (USB) interface The total FPGA resource utilization is 11.508 out of 33.088 (34%) available slices The measured MAC throughput is 100 7 Mbps and 109 2 Mbps tor voice and video access categories, transmitted at a data rate of 260 Mbps based on IEEE 802 11n Physical Layer (PHY) using the contention-based hybrid coordination function channel access mechanism | - |
dc.language | English | - |
dc.publisher | IEICE-Inst Electronics Information Communications Eng | - |
dc.title | A High Throughput Medium Access Control Implementation Based on IEEE 802.11e Standard | - |
dc.type | Article | - |
dc.identifier.wosid | 000276848300021 | - |
dc.identifier.scopusid | 2-s2.0-77950479631 | - |
dc.type.rims | ART | - |
dc.citation.volume | E93B | - |
dc.citation.issue | 4 | - |
dc.citation.beginningpage | 948 | - |
dc.citation.endingpage | 960 | - |
dc.citation.publicationname | IEICE TRANSACTIONS ON COMMUNICATIONS | - |
dc.contributor.localauthor | Park, Sin Chong | - |
dc.contributor.nonIdAuthor | Setiawan, Hendra | - |
dc.contributor.nonIdAuthor | Ochi, Hiroshi | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | IEEE 802 11e | - |
dc.subject.keywordAuthor | MAC | - |
dc.subject.keywordAuthor | EDCA | - |
dc.subject.keywordAuthor | FPGA | - |
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