Low-power and low NF V-band down-converter in 0.13 mu m CMOS

Abstract

A V-band down-converter integrating a LNA and mixer in 0.13 mu m CMOS technology is presented. The LNA has a current re-use topology for low power consumption. The transistor size of the LNA is optimised by the substrate noise for the low noise figure (NF) and f(max) for high gain performance. The new resistive mixer for low LO power operation is proposed. The NF of the down-converter is 4.7 dB. The conversion gain and input P(1dB) are 0.67 dB and -12.5 dBm, respectively. The proposed circuit, consuming only 11.6 mW, shows the lowest NF and highest linearity among V-band down-converters.