DC Field | Value | Language |
---|---|---|
dc.contributor.author | Han, Jin-Woo | ko |
dc.contributor.author | Moon, Dong-Il | ko |
dc.contributor.author | Kim, Dong-H | ko |
dc.contributor.author | Choi, Yang-Kyu | ko |
dc.date.accessioned | 2013-03-08T17:57:09Z | - |
dc.date.available | 2013-03-08T17:57:09Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2009-10 | - |
dc.identifier.citation | IEEE ELECTRON DEVICE LETTERS, v.30, no.10, pp.1108 - 1110 | - |
dc.identifier.issn | 0741-3106 | - |
dc.identifier.uri | http://hdl.handle.net/10203/93822 | - |
dc.description.abstract | A high-performance unified RAM without soft programming is demonstrated on a fully depleted FinFET structure. An oxide/nitride/oxide gate dielectric is integrated in a floating-body FinFET, thereby providing the versatile functions of nonvolatile Flash memory and high-speed capacitorless 1T-DRAM. A new read method involving the utilization of a parasitic bipolar junction transistor is employed for the capacitorless 1T-DRAM mode. This manner provides nondestructive reading and a high sensing current window (Delta I(S) > 45 mu A). As the nitride traps are filled with holes before activating the capacitorless 1T-DRAM mode, an undesirable contribution of hole trapping on a threshold voltage shift, i.e., soft programming, is inhibited without sacrificing the sensing current window. | - |
dc.language | English | - |
dc.publisher | IEEE-Inst Electrical Electronics Engineers Inc | - |
dc.subject | SINGLE-TRANSISTOR LATCH | - |
dc.subject | SOI MOSFETS | - |
dc.subject | URAM | - |
dc.title | Parasitic BJT Read Method for High-Performance Capacitorless 1T-DRAM Mode in Unified RAM | - |
dc.type | Article | - |
dc.identifier.wosid | 000270227600032 | - |
dc.identifier.scopusid | 2-s2.0-72049105065 | - |
dc.type.rims | ART | - |
dc.citation.volume | 30 | - |
dc.citation.issue | 10 | - |
dc.citation.beginningpage | 1108 | - |
dc.citation.endingpage | 1110 | - |
dc.citation.publicationname | IEEE ELECTRON DEVICE LETTERS | - |
dc.identifier.doi | 10.1109/LED.2009.2029353 | - |
dc.contributor.localauthor | Choi, Yang-Kyu | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | Bipolar junction transistor (BJT) | - |
dc.subject.keywordAuthor | capacitorless 1T-DRAM | - |
dc.subject.keywordAuthor | FinFET | - |
dc.subject.keywordAuthor | nonvolatile memory (NVM) | - |
dc.subject.keywordAuthor | single transistor latch | - |
dc.subject.keywordAuthor | soft programming | - |
dc.subject.keywordAuthor | unified RAM (URAM) | - |
dc.subject.keywordPlus | SINGLE-TRANSISTOR LATCH | - |
dc.subject.keywordPlus | SOI MOSFETS | - |
dc.subject.keywordPlus | URAM | - |
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