Dopant-free FUSI PtxSi metal gate for high work function and reduced Fermi-level pinning

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dc.contributor.authorPark, CSko
dc.contributor.authorCho, Byung Jinko
dc.date.accessioned2013-03-08T09:20:19Z-
dc.date.available2013-03-08T09:20:19Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2005-11-
dc.identifier.citationIEEE ELECTRON DEVICE LETTERS, v.26, no.11, pp.796 - 798-
dc.identifier.issn0741-3106-
dc.identifier.urihttp://hdl.handle.net/10203/92717-
dc.description.abstractHigh work function (4.9 eV) on high-kappa gate dielectric, which is suitable for bulk p-MOSFET, has been achieved using fully silicided (FUSI) PtxSi gate without boron predoping of polysilicon. High concentration of Pt in FUSI PtxSi using Ti capping layer on Pt in the FUSI process is a key to achieving high work function and reduced Fermi-level pinning on high-kappa dielectric. By combining with substituted Al (SA) gate for nMOSFET, a wide range of work function difference (0.65 eV) between n and pMOSFETs is demonstrated, without any adverse effects of polysilicon predoping.-
dc.languageEnglish-
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectTHERMAL-INSTABILITY-
dc.subjectFILMS-
dc.titleDopant-free FUSI PtxSi metal gate for high work function and reduced Fermi-level pinning-
dc.typeArticle-
dc.identifier.wosid000232821500006-
dc.identifier.scopusid2-s2.0-27744536796-
dc.type.rimsART-
dc.citation.volume26-
dc.citation.issue11-
dc.citation.beginningpage796-
dc.citation.endingpage798-
dc.citation.publicationnameIEEE ELECTRON DEVICE LETTERS-
dc.identifier.doi10.1109/LED.2005.857711-
dc.contributor.localauthorCho, Byung Jin-
dc.contributor.nonIdAuthorPark, CS-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorhigh-kappa-
dc.subject.keywordAuthormetal gate-
dc.subject.keywordAuthorwork function-
dc.subject.keywordPlusTHERMAL-INSTABILITY-
dc.subject.keywordPlusFILMS-
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