Demonstration of high-performance PMOSFETs using Si-SixGe1-x-Si quantum wells with high-kappa/metal-gate stacks

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Through a systematic approach, PMOSFETs with strained quantum wells (QWs) in the Si-Ge system exhibiting high performance and low OFF-state leakage currents comparable to optimized gate stacks on Si are demonstrated. The encouraging results are due to selectively depositing Si-Si(x)Ge(1-x)-Si heterostructure QWs, where it appears that the critical thickness requirements for these thin films based on the lattice constant mismatch are relaxed. Furthermore, the use of optimal advanced high-kappa dielectric and metal-gate electrode helped realize the good device characteristics.
Publisher
IEEE
Issue Date
2008-01
Language
English
Article Type
Article
Keywords

SI(100); GROWTH; GE

Citation

IEEE ELECTRON DEVICE LETTERS, v.29, no.1, pp.99 - 101

ISSN
0741-3106
DOI
10.1109/LED.2007.911987
URI
http://hdl.handle.net/10203/89785
Appears in Collection
EE-Journal Papers(저널논문)
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