Advanced constant multiplier for multipath pipelined FFT processor

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A novel method for reducing the number of equivalent complex multipliers for a multipath mixed-radix 128-point FFT processor using an advanced constant multiplier is proposed.
Publisher
INST ENGINEERING TECHNOLOGY-IET
Issue Date
2008-04
Language
English
Article Type
Article
Keywords

FFT/IFFT PROCESSOR

Citation

ELECTRONICS LETTERS, v.44, no.8, pp.518 - 520

ISSN
0013-5194
DOI
10.1049/el:20080205
URI
http://hdl.handle.net/10203/89637
Appears in Collection
EE-Journal Papers(저널논문)
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