Imposing a k constraint in recording systems employing post-Viterbi error correction

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A strategy for imposing a kappa constraint without any rate penalty is proposed for recording systems that already employ a post-Viterbi error-correction processor. Although the method is general, we focus on the application to perpendicular magnetic recording. This scheme is based on deliberate insertion of a short pattern, which contains one or more transitions and can be detected by an inner error-detection code, in the prolonged absence of magnetic transitions in the data bit pattern. The post-Viterbi processor attempts an error event correction by examining the likelihoods of a list of error events including the one due to the inserted pattern that forces the k constraint. The signal-to-noise ratio loss compared to the ideal system with k = infinity but perfect timing recovery is negligible at either a fixed bit-error rate or a fixed sector-error rate.
Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Issue Date
2005-10
Language
English
Article Type
Article; Proceedings Paper
Keywords

NOISE

Citation

IEEE TRANSACTIONS ON MAGNETICS, v.41, no.10, pp.2995 - 2997

ISSN
0018-9464
DOI
10.1109/TMAG.2005.854448
URI
http://hdl.handle.net/10203/88428
Appears in Collection
EE-Journal Papers(저널논문)
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