An efficient fragment processing technique in A-buffer implementation

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In this paper, a fragment-processing solution in 3D graphics rendering algorithms based on fragment lists (i.e. A-buffer) for minimizing loss of image quality is described. While all fragment information should be preserved for exact hidden surface removal, this places additional strain on hardware in terms of silicon gates and clock cycles. Therefore, we propose a fragment processing technique that can effectively merge fragments in order to decrease the depth of fragment lists. It renders scenes quite accurately even in the case when three fragments intersect each other. This algorithm improves hardware acceleration without deteriorating image quality.
Publisher
IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
Issue Date
2004-01
Language
English
Article Type
Article
Citation

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E87A, pp.258 - 269

ISSN
0916-8508
URI
http://hdl.handle.net/10203/82422
Appears in Collection
EE-Journal Papers(저널논문)
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