G-vector: A new model for glitch analysis in logic circuits

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One of the major factors which contribute to the power consumption in CMOS combinational logic circuits is the switching activities in the circuits. Many of such switching activities are due to spurious pulses, called glitches. In this paper, we propose a new model for describing signals that contain glitches, called G-vector. Unlike the previous works in which their primary concern is modeling the propagation of glitches to count the number of glitches in the circuits, our G-vector provides a general, but effective model for generation, propagation and elimination of glitches, enabling us to not only count the number of glitches but also locate the glitches so that such information can be utilized by system tools for the reduction of the number of glitches in the circuits. We provide a set of experimental results to demonstrate the effectiveness of our model.
Publisher
KLUWER ACADEMIC PUBL
Issue Date
2001-03
Language
English
Article Type
Article
Keywords

POWER ESTIMATION

Citation

JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, v.27, no.3, pp.235 - 251

ISSN
0922-5773
DOI
10.1023/A:1008139232134
URI
http://hdl.handle.net/10203/79965
Appears in Collection
RIMS Journal Papers
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