An enhanced memory assignment scheme for memory-based FFT processor

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In this study, we analyze the memory-based architecture of the FFT processor using the radix-4, and propose a novel mechanism that improves the throughput while simultaneously decreasing the area using single-port memories with several banks.
Publisher
IEICE-Inst Electronics Information Communications Eng
Issue Date
2004
Language
English
Article Type
Article
Citation

IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, v.E87A, no.11, pp.3020 - 3024

ISSN
0916-8508
URI
http://hdl.handle.net/10203/79697
Appears in Collection
EE-Journal Papers(저널논문)
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