Datapath layout optimisation using genetic algorithm and simulated annealing

Abstract

The paper deals with the minimisation of the track density and the interconnection delay in the design of a high-performance compact datapath. The authors applied a hybrid approach of genetic algorithm (GA) and simulated annealing (SA) to determine the optimal datapath element ordering to minimise both the track density and the wire length. To improve the computation speed, they used the datapath-specific genetic operators. Experimental results for the 'real-world' microprocessor examples show that the GA/SA hybrid approach outperforms the existing genetic approaches and gives similar results to simulated annealing with much less computation time.