Sub-5nm All-Around Gate FinFET for Ultimate Scaling

Sub-5nm all-around gate FinFETs with 3nm fin width were fabricated for the first time. The n-channel FinFET of sub-5nm with 1.4nm HfO2 shows an IDsat of 497μA/μm at VG=VD=1.0V. Characteristics of sub-5nm transistor are verified by using 3-D simulations as well as analytical models. A threshold voltage increases as the fin width reduces by quantum confinement effects. The threshold voltage shift was fitted to a theoretical model with consideration of the first-order perturbation theory. And a channel orientation effect, based on a current-flow direction, is shown.
Publisher
IEEE
Issue Date
2006-06-13
Keywords

Sub-5nm; All-Around Gate; FinFET; Ultimate Scaling

Citation

IEEE Symposium on VLSI Technology Digest of Technical Papaers, pp. 70-71

ISBN
1-4244-0005-8
URI
http://hdl.handle.net/10203/698
Appears in Collection
EE-Conference Papers(학술회의논문)
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