DC Field | Value | Language |
---|---|---|
dc.contributor.author | Yoon, CW | ko |
dc.contributor.author | Woo, R | ko |
dc.contributor.author | Kook, J | ko |
dc.contributor.author | Lee, SJ | ko |
dc.contributor.author | Lee, K | ko |
dc.contributor.author | Yoo, Hoi-Jun | ko |
dc.date.accessioned | 2008-07-22T09:05:36Z | - |
dc.date.available | 2008-07-22T09:05:36Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2001-11 | - |
dc.identifier.citation | IEEE JOURNAL OF SOLID-STATE CIRCUITS, v.36, no.11, pp.1758 - 1767 | - |
dc.identifier.issn | 0018-9200 | - |
dc.identifier.uri | http://hdl.handle.net/10203/6297 | - |
dc.description.abstract | A low-power multimedia processor for mobile applications is presented. An 80-MHz 32-b RISC with enhanced multiplier, two 20-MHz hardware accelerators with 7.125-Mb embedded DRAM for MPEG-4 visual SP@L1 decoding and 3-D graphics processing, 2-kB dual-port SRAM, and peripheral blocks are integrated together on a single chip. MPEG-4 SP@L1 video decoding and 3-D graphics rendering with a 16-b depth-buffer alpha-blending double-buffering and gouraud-shading features at 2.2-Mpolygons/s speed are realized with the help of the dedicated hardware accelerators. The architecture of the processor is optimized in terms of power consumption and performance, and various low-power circuit techniques are adopted in each hardware block. The chip is implemented using 0.18-mum embedded memory logic (EML) technology. Its area is 84 mm(2), and power consumption is 160 mW when all of the functions are activated. | - |
dc.language | English | - |
dc.language.iso | en_US | en |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.title | An 80/20-MHz 160-mW multimedia processor integrated with embedded DRAM, MPEG-4 accelerator, and 3-D rendering engine for mobile applications | - |
dc.type | Article | - |
dc.identifier.wosid | 000171893000021 | - |
dc.identifier.scopusid | 2-s2.0-0035505586 | - |
dc.type.rims | ART | - |
dc.citation.volume | 36 | - |
dc.citation.issue | 11 | - |
dc.citation.beginningpage | 1758 | - |
dc.citation.endingpage | 1767 | - |
dc.citation.publicationname | IEEE JOURNAL OF SOLID-STATE CIRCUITS | - |
dc.embargo.liftdate | 9999-12-31 | - |
dc.embargo.terms | 9999-12-31 | - |
dc.contributor.localauthor | Yoo, Hoi-Jun | - |
dc.contributor.nonIdAuthor | Yoon, CW | - |
dc.contributor.nonIdAuthor | Woo, R | - |
dc.contributor.nonIdAuthor | Kook, J | - |
dc.contributor.nonIdAuthor | Lee, SJ | - |
dc.contributor.nonIdAuthor | Lee, K | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordAuthor | 3-D graphics processing | - |
dc.subject.keywordAuthor | embedded DRAM | - |
dc.subject.keywordAuthor | low power | - |
dc.subject.keywordAuthor | mobile application | - |
dc.subject.keywordAuthor | MPEG-4 visual | - |
dc.subject.keywordAuthor | multimedia processor | - |
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