Integration of PIN and Vertical Junction Field Effect Transistor for Photodetector Optoelectronic Integrated Circuit

Abstract

The integration of a PIN photodiode and a vertical junction field effect transistor (VJFET) is useful for optoelectronic integrated circuit (OEIC) since the structure is compact and has potentially high power and high speed capabilities. A GaAs VJFET with the gate connected to PIN was fabricated. The fabricated PIN has a low leakage current, below 50 nA at 10 V bias. Two step atmospheric pressure metalorganic chemical vapor deposition (AP MOCVD) was used and the second step epitaxial layers were selectively grown using silicon dioxide (SiO2) mask. The gate p-layer has a tungsten (W) layer on it and was doped by carbon to prevent autodoping during the second step epitaxy. This VJFET has an improved current-voltage characteristics than the one without W on p-gate layer.