시뮬레이티드 어닐링을 이용한 마크로 블록의 배치 Macro Block Placement Using Simulated Annealing

Publisher
대한전자공학회
Issue Date
1989-02
Language
KOR
Citation

전자공학회지, v.26, no.2, pp.286 - 293

ISSN
1016-135X
URI
http://hdl.handle.net/10203/57674
Appears in Collection
EE-Journal Papers(저널논문)
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