C&C view architecture is one of the modeling languages to describe and analyze runtime architecture of a software system. However, it is not sufficient to describe runtime architectural behaviors with only C&C view because C&C view architecture does not provide a sequence and statechart of a software system. On the other side, we would use Finite State Process (FSP) model for describing behavior and property of component in a software system. FSP model can be simple to show behavioral sequence and state of component. Moreover, we can check a property of a component with FSP model, once a FSP model of a software system is given.
In this thesis, we propose an approach to model and verify C&C view architecture for a software system. Additionally, in using FSP model, the requirements represented using the FSP properties can be automatically checked against the C&C view architecture with a Labeled Transition Systems Analyzer (LTSA). This approach can support early detection of system``s behavior errors automatically.
In order to develop a FSP model for a system, the system requirements in the form of scenario fragments such as use case scenarios or sequence diagrams need to be developed into a model that captures the full behaviors for a component and a connector. The suggested approach of this thesis applies a technique to synthesize finite state machines from message sequence charts, which was developed by Harel, Kugler and Pnueli. Finally, to verify our approach``s efficacy, we applied the approach to a exemplary system, which is a translator system. The experimental results are described.