This thesis describes the design and fabrication of MMIC low noise amplifiers for 5.X GHz wireless LAN applications, using 0.25 $\mum$ gate length AlGaAs/InGaAs/ GaAs pseudomorphic high electron mobility transistors. The two-stage LNA is designed to meet the noise requirements for high data rate wireless LAN, DSRC, and multi-purpose ISM band applications. The first stage of the LNA is designed to provide a simultaneous noise and impedance match by careful adjusting both gate width and series feedback inductance at the source, and the inter-stage and the output stage are matched to $50\Omega$.
The on-chip matched LNA has a small signal gain of 16 dB from 5.5 GHz to 8.0 GHz range with a deviation less than $\pm0.4$ dB in its peak to peak values, which shows wide-band gain flatness. Both input and output return losses are less than -10 dB between 5.5 GHz and 8.0 GHz. It reveals noise figure less than 0.88 dB and associated gain over 16 dB at the frequency range between 5.2 GHz and 6.4 GHz. We believe that the noise figure of 0.79 dB at 5.8 GHz is the best result ever reported to date from MMIC LNAs in this frequency range.