Analysis for linearization and efficiency enhancement of RF power amplifier ICs for mobile handset모바일 핸드셋용 초고주파 전력증폭기 집적회로의 효율 개선과 선형화기 분석

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dc.contributor.advisorPark, Chul-Soon-
dc.contributor.advisor박철순-
dc.contributor.authorKim, Ji-Hoon-
dc.contributor.author김지훈-
dc.date.accessioned2011-12-28T02:44:54Z-
dc.date.available2011-12-28T02:44:54Z-
dc.date.issued2008-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=393022&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/54613-
dc.description학위논문(박사) - 한국정보통신대학교 : 공학부, 2008.8, [ xvi, 119 p. ]-
dc.description.abstractThis dissertation presents linearity improvement of RF power amplifier MMICs and extended average power usage efficiency at low power levels. The major applications are wide-band code division multiple access (W-CDMA) and Wireless- LAN applications. Non-constant envelope modulation, such as hybrid phase-shift keying (HPSK) and orthogonal frequency division multiplexing (OFDM) modulation retains large peak-to-average power ratio (PAR) of 3.5~7 dB for W-CDMA and 8~10 dB for WLAN because these modulation schemes provide a high data-rate for transmission with mobile terminals. A power amplifier must be operated at back-off output power level as much as PAR value in order to satisfy a stringent linearity requirement. A compact integrated linearizer is necessary for a power amplifier MMIC that maintains nonlinear characteristics such as amplitude modulation (AM) - amplitude modulation (AM) and amplitude modulation (AM) - phase modulation (PM) distortion. The linearizer of a power amplifier plays an important role with improvement of current drive capability and optimized impedance of an active bias circuit. A power amplifier with an active bias circuit based on a current mirror circuit operates on Class AB mode that increases dc current level depending on RF input power signal level. On-chip linearizer utilizing a series LC network reduces the impedance seen at the emitter node drastically, and thus compensate for the base-emitter junction dc bias voltage ($V_{BE}$) decrease of the power transistor. Simultaneously, a series LC network and the base-emitter junction diode make a rectifier circuit in converting partially injected RF signal into rectified dc current. Consequently the VBE value of the main transistor and the dc bias current level are well compensated for linearization of a power amplifier. The proposed power amplifiers enhance linearity indexes such as 1-dB compression point ($P_1dB$), intermodulation distortion (IMD) and error vector magnitude (EVM) va...eng
dc.languageeng-
dc.publisher한국정보통신대학교-
dc.subjectSiGe-
dc.subjectLinearizer-
dc.subjectPower amplifier-
dc.subjectintermodulation distortion-
dc.subject상호왜곡-
dc.subject실리콘게르마늄-
dc.subject초고주파 단일칩 집적회로-
dc.subject선형화기-
dc.subject전력증폭기-
dc.titleAnalysis for linearization and efficiency enhancement of RF power amplifier ICs for mobile handset-
dc.title.alternative모바일 핸드셋용 초고주파 전력증폭기 집적회로의 효율 개선과 선형화기 분석-
dc.typeThesis(Ph.D)-
dc.identifier.CNRN393022/225023-
dc.description.department한국정보통신대학교 : 공학부, -
dc.identifier.uid020035327-
dc.contributor.localauthorPark, Chul-Soon-
dc.contributor.localauthor박철순-
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School of Engineering-Theses_Ph.D(공학부 박사논문)
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