Memory operation of InAs quantum dot heterostructure field effect transistor

The memory operation of a self-assembled InAs quantum dot heterostructure field effect transistor (FET) is presented. The amount of trapped electrons in the quantum dots determines the gate-source capacitance and the drain current at a gate bias. In capacitance-voltage (C-V) measurement at low frequency, the quantum dots respond to the signal and a difference of capacitance was observed. These results imply that the memory operation is due to the charge trapping effect of InAs quantum dots.
Publisher
INST PURE APPLIED PHYSICS
Issue Date
2001-04
Language
ENG
Keywords

PHOTOCONDUCTIVITY

Citation

JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES REVIEW PAPERS, v.40, no.4B, pp.2801 - 2803

ISSN
0021-4922
URI
http://hdl.handle.net/10203/4613
Appears in Collection
EE-Journal Papers(저널논문)
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