A 1.67 GHz 32-bit pipelined carry-select adder using the complementary scheme

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dc.contributor.authorKim, Y.ko
dc.contributor.authorSung, K.-H.ko
dc.contributor.authorKim, Lee-Supko
dc.date.accessioned2007-05-31T02:23:16Z-
dc.date.available2007-05-31T02:23:16Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2002-05-26-
dc.identifier.citation2002 IEEE International Symposium on Circuits and Systems, pp.I-461 - I-464-
dc.identifier.issn0271-4310-
dc.identifier.urihttp://hdl.handle.net/10203/396-
dc.descriptionISCAS.2002en
dc.description.sponsorshipThis work was supported by KOSEF through the MICROS at KAIST, Koreaen
dc.languageEnglish-
dc.language.isoen_USen
dc.publisherIEEE-
dc.titleA 1.67 GHz 32-bit pipelined carry-select adder using the complementary scheme-
dc.typeConference-
dc.identifier.wosid000186280600116-
dc.identifier.scopusid2-s2.0-0036287182-
dc.type.rimsCONF-
dc.citation.beginningpageI-461-
dc.citation.endingpageI-464-
dc.citation.publicationname2002 IEEE International Symposium on Circuits and Systems-
dc.identifier.conferencecountryUS-
dc.identifier.conferencelocationPhoenix, AZ-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorKim, Lee-Sup-
dc.contributor.nonIdAuthorKim, Y.-
dc.contributor.nonIdAuthorSung, K.-H.-
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