A 1.67 GHz 32-bit pipelined carry-select adder using the complementary scheme

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Publisher
IEEE
Issue Date
2002-05-26
Language
English
Description

ISCAS.2002

Citation

2002 IEEE International Symposium on Circuits and Systems, pp.I-461 - I-464

ISSN
0271-4310
URI
http://hdl.handle.net/10203/396
Appears in Collection
EE-Conference Papers(학술회의논문)
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