(An) implementation of communication module for a hypercube multicomputer = 하이퍼큐브 구조를 갖는 멀티컴퓨터상에서의 통신 모듈의 구현

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A communication module for a hypercube multicomputer is designed and implemented. The performance of a hypercube would be increased by providing a dedicated communication processor for interprocessor communications. The communication module consists of a I/O processor, two DMACs, and about one hundred TTL chips. The channel transmission speed is 8Mbps for each channel. Four full-duplexes communication channels are provided for each module. It is shown that they can operate simultaneously with little degradation of transfer rates. Communication kernel, software of communication module, is modularized using layered approach and standardized. Adaptive packet routing algorithms are also suggested for more efficient interprocessor communication facility.
Advisors
Kim, Myung-Hwanresearcher김명환researcher
Description
한국과학기술원 : 전기 및 전자공학과,
Publisher
한국과학기술원
Issue Date
1990
Identifier
67313/325007 / 000881105
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 1990.2, [ [iii], 55, [1] p. ]

URI
http://hdl.handle.net/10203/39102
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=67313&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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