Dual-issue real-time CABAC decoder for high definition H.264/AVC bitstream고화질 H.264/AVC 영상용 이중 이슈 실시간 CABAC 복호기

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This thesis proposes a novel decoding architecture to decode in real-time H.264/AVC bitstream coded in Context-based Adaptive Binary Arithmetic Coding (CABAC). The proposed architecture issues two context model sets at the same time, which leads to drastic reduction in cycles invoked by the syntax element switching overhead that degrades the decoding performance significantly. To design such an efficient architecture, a thorough investigation on the transition pattern of syntax elements has been conducted. Furthermore, the statistics on numbers of bins for a SE which implies the significance of SBS has ignited it to develop the proposed architecture. The concept of dual-fetch is realized by adding a cache named context pre-fetch buffer and a multiplexer to a conventional two-stage architecture for CABAC decoding, which leads to a slight increase in the hardware complexity while enabling it to achieve a drastic enhancement in decoding performance. To fully exploit the proposed architecture, an efficient pipeline scheduling algorithm is presented as well. As a result, the proposed architecture releases the CABAC parsing from a bottleneck in decoding H.264 bitstream by achieving a decoding performance of 1.7 cycle/bin.
Advisors
Park, In-Cheolresearcher박인철researcher
Description
한국과학기술원 : 전기및전자공학전공,
Publisher
한국과학기술원
Issue Date
2009
Identifier
308880/325007  / 020074161
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학전공, 2009.2, [ iii, 49 p. ]

Keywords

H.264; CABAC; VLSI; Architecture; H.264; 문맥적응적이진산술부호; 집적회로; 아키텍처; H.264; CABAC; VLSI; Architecture; H.264; 문맥적응적이진산술부호; 집적회로; 아키텍처

URI
http://hdl.handle.net/10203/38759
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=308880&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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