Modified delta sigma modulator for low phase noise frequency synthesizer저 위상 잡음 주파수 합성기를 위한 변형 델타 시그마 변조기

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dc.contributor.advisorPark, In-Cheol-
dc.contributor.advisor박인철-
dc.contributor.authorYou, Duk-Hyun-
dc.contributor.author유덕현-
dc.date.accessioned2011-12-14T02:07:52Z-
dc.date.available2011-12-14T02:07:52Z-
dc.date.issued2009-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=308829&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/38709-
dc.description학위논문(석사) - 한국과학기술원 : 전기및전자공학전공, 2009.2, [ vii, 58 p. ]-
dc.description.abstractThe demand for wireless system products has been increasing rapidly due to the success of handheld communication device and the convergence trend. The local oscillator of the wireless system is usually implemented as a phase locked loop (PLL) to get a better phase noise performance. As wireless standards are getting evolved, the phase noise specifications also are getting harder, because the system performance such as BER and SNR can be affected by it. Therefore, the frequency synthesizer, or LO, used in wireless system should have the phase noise specification as low as possible. However, the phase noise performance is varied depending on the input of delta-sigma modulator and it should be suppressed for low phase noise specification. The main idea of the proposed DSM is to change from original delta-sigma modulator input to the delta-sigma modulator input value that has better noise shaping. The output phase noise performance has lower in band phase noise and larger out band phase noise when the input is applied toward 0.5 because the DSM output is PWM encoded. Thus, if the input of the DSM is concentrated on the around 0.5, the DSM in-band phase noise is better. The maximum in-band phase noise difference between the proposed architecture and the conventional architecture is about -240 dBc/Hz. It could be concluded that the in-band DSM phase noise performance is improved by using the proposed DSM architecture. Thus, it indicates that the CP noise is always dominant within the in-band. With CP noise, the in-band phase noise performance is improved by -10 dBc/Hz. Although the proposed architecture is implemented with the $2^{nd}$ order DSM, the proposed architecture can be adopted to the DSM of any order. This could be an advantage because the backward compatibility is very high. The characteristics of the frequency synthesizer based on the proposed delta-sigma modulator are given in the followings. The frequency synthesizer shows lock-i...eng
dc.languageeng-
dc.publisher한국과학기술원-
dc.subjectPhase Locked Loop-
dc.subjectFrequency Synthesizer-
dc.subjectDelta Sigma Modulator-
dc.subjectPhase Noise-
dc.subject위상 동기 루프-
dc.subject주파수 합성기-
dc.subject델타 시그마 변조기-
dc.subject위상 잡음-
dc.subjectPhase Locked Loop-
dc.subjectFrequency Synthesizer-
dc.subjectDelta Sigma Modulator-
dc.subjectPhase Noise-
dc.subject위상 동기 루프-
dc.subject주파수 합성기-
dc.subject델타 시그마 변조기-
dc.subject위상 잡음-
dc.titleModified delta sigma modulator for low phase noise frequency synthesizer-
dc.title.alternative저 위상 잡음 주파수 합성기를 위한 변형 델타 시그마 변조기-
dc.typeThesis(Master)-
dc.identifier.CNRN308829/325007 -
dc.description.department한국과학기술원 : 전기및전자공학전공, -
dc.identifier.uid020073329-
dc.contributor.localauthorPark, In-Cheol-
dc.contributor.localauthor박인철-
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EE-Theses_Master(석사논문)
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