The speed of Dram has been increased rapidly with the development of various multi-media applications. It is important that data is transfered and received without the distortion of the one in high speed interface. The object of this research is the slew rate control of output driver using in Dram.
To transfer data in Gb/s interface, it has to be considered that the factor, which is like as PVT variation, I/O component capacitance reduces the data margin. Because, slew rate is varied over these factors. High slew rate of output driver makes low noise margin due to SSO noise (Simultaneous-Switching Output noise). Low slew rate reduces data eye and leads to ISI (Inter-Symbol Interference). Above two cases lead to reduce data margin. So if slew-rate is changed sensitively by a certain variable, output driver can’t transfer the data stably. This is the reason that slew rate has to be constant and moderated for high speed output driver in PVT, I/O capacitance variation.
Many researches about slew rate control over PVT variation have performed. There are several methods like that compensation using PLL, compensation using replica bias circuit, compensation using capacitive feedback. But the compensation method using capacitive feedback is not suitable for Gb/s interface, because the circuit for detecting PVT environment is not existed. whenever each rising and falling edge of data is occurred, the compensation process has to be followed. So it makes limitation to reduce compensation time. The compensation method using PLL is difficult to apply to dram output driver which is formed of coded driver. Because slew rate control circuit has large area.
Output driver is composed of main driver, pre-driver. Generally, Pre-driver controls the slew rate. Turning on and off the PMOS and NMOS gate of main driver using pre-driver, the slew and driving strength of main driver is adjusted. This research is on this basic. Conventional slew rate controlled output dr...