16x16 비트 웨이브 파이프라인 곱셈기의 설계 및 구현Design of a 16x16-bit wave-pipelined multiplier

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dc.contributor.advisor황승호-
dc.contributor.advisorHwang, Seung-Ho-
dc.contributor.author임종상-
dc.contributor.authorYim, Jong-Sang-
dc.date.accessioned2011-12-14T02:01:49Z-
dc.date.available2011-12-14T02:01:49Z-
dc.date.issued1995-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=101823&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/38321-
dc.description학위논문(석사) - 한국과학기술원 : 전기및전자공학, 1995.8, [ iii, 56 p. ]-
dc.languagekor-
dc.publisher한국과학기술원-
dc.subject웨이브 파이프라인 곱셈기-
dc.subjectWave-Pipelined Multiplier-
dc.title16x16 비트 웨이브 파이프라인 곱셈기의 설계 및 구현-
dc.title.alternativeDesign of a 16x16-bit wave-pipelined multiplier-
dc.typeThesis(Master)-
dc.identifier.CNRN101823/325007-
dc.description.department한국과학기술원 : 전기및전자공학, -
dc.identifier.uid000933419-
dc.contributor.localauthor황승호-
dc.contributor.localauthorHwang, Seung-Ho-
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EE-Theses_Master(석사논문)
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