(The) design and implementation of distributed shared-memory multiprocessor using VHDl

Abstract

Multiprocessors are the most appropriate type of computer systems to meet the increasing need for more computing power. Among them, the distributed shared-memory multiprocessors are being considered to be the most promising architecture from a performance and programmability perspective. One of the most critical issues in the design of the distributed shared-memory multiprocessors is the cache coherence strategy. Among the cache coherence strategies, the directory scheme delivers the best performance. In this thesis, the multiprocessor, which is based on the memory-based fullmap directory scheme, is implemented using VHDL, and the correctness of the directory scheme is verified by executing the trace-driven simulation with real traces. The design problems encountered in implementing the multiprocessor, such as deadlock, are examined. The implementation of the multiprocessor using VHDL can have the benefit that the implementation of the multiprocessor into real hardware may be accomplished without severe efforts. The trace-driven simulation shows that, when the cache hit rate is sufficiently high, the write operation is one of the main bottlenecks which degrade system performance. If the cache hit rate is low, the unnecessary replacements occur frequently. By these replacements, the latency of read operation can be lengthened. The cache hit rate has a great effect on the system performance. Therefore, it is very important to keep the cache hit rate high.