Design of low power digital hearing aid chip

Abstract

The hearing problem has become more and more serious. As a result, needs for hearing aids have been increased. One of the most important measure of performance of a hearing aid is its power. And to compensate the different hearing losses of each person, digital hearing aids are required. In this work, a single mixed-signal chip for a digital hearing aid instrument is designed in low threshold 0.18um CMOS process. This chip comprises the following functions: a microphone preamplifier with MOS Resistive Circuit (MRC), a 1-bit 2nd order delta-sigma AD converter, a programmable 2 channel digital signal processor (DSP) with a ROM and serial interface, a 1-bit 2nd order delta-sigma DA converter, a H-bridge and a ring oscillator. Supply voltage is determined to be 1V to prevent unnecessary power consumption. Total power consumption for a full swing input signal is 275uW. This enables at least 2 weeks of life time of hearing aids at 16 hours/day for a small zinc-air battery. The typical SNR and THD of the complete signal path are 72dB and -45dB, each.