Performance implovement of behavioral emulation system using performance model

Abstract

Behavioral emulation system performs in-system verification of the behavioral description of a chip in the context of its application board at the early design stage. As the behavioral emulation system is a kind of embedded system, its performance is decided by the operating system and the methods of hardware management. This thesis describes the methods how to improve the performance of the behavioral emulation system, focusing on the thread scheduler and buffer management. We propose effective thread-scheduling algorithms and decision formula of buffer constraint to support designs those have various target interfaces. To measure accurate performance, we make a performance model of the behavioral emulation system. The proposed idea is validated by analyzing the performance of MP3 decoder chip.