S-band에서 동작하는 PLL을 이용한 주파수 합성기의 설계 및 제작Design and implementation of a phase-locked frequency synthesizer at S-band(2.225 - 2.23GHz)
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.advisor | 최순달 | - |
| dc.contributor.advisor | Choi, Soon-Dal | - |
| dc.contributor.author | 윤병수 | - |
| dc.contributor.author | Yun, Byeong-Soo | - |
| dc.date.accessioned | 2011-12-14T01:38:30Z | - |
| dc.date.available | 2011-12-14T01:38:30Z | - |
| dc.date.issued | 1996 | - |
| dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=105985&flag=dissertation | - |
| dc.identifier.uri | http://hdl.handle.net/10203/36826 | - |
| dc.description | 학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 1996.2, [ iii, 54 p. ] | - |
| dc.language | kor | - |
| dc.publisher | 한국과학기술원 | - |
| dc.subject | 주파수합성기 | - |
| dc.subject | 전압조정발진기 | - |
| dc.subject | S-band | - |
| dc.subject | Frequency sythesizer | - |
| dc.subject | PLL | - |
| dc.subject | VCO | - |
| dc.title | S-band에서 동작하는 PLL을 이용한 주파수 합성기의 설계 및 제작 | - |
| dc.title.alternative | Design and implementation of a phase-locked frequency synthesizer at S-band(2.225 - 2.23GHz) | - |
| dc.type | Thesis(Master) | - |
| dc.identifier.CNRN | 105985/325007 | - |
| dc.description.department | 한국과학기술원 : 전기 및 전자공학과, | - |
| dc.identifier.uid | 000943355 | - |
| dc.contributor.localauthor | 최순달 | - |
| dc.contributor.localauthor | Choi, Soon-Dal | - |
- Appears in Collection
- EE-Theses_Master(석사논문)
- Files in This Item
- There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.