Design of linearity enhancement and multi-band power amplifier for wireless comminications

Abstract

The power amplifier has been one of the crucial components in wireless communication systems. Accordingly, to exhibit excellent performance, the power amplifier based on compound semiconductors is being studied intensively. However, power amplifier based on silicon semiconductors are expected to be cheaper than power amplifier based on compound semiconductors and easier to integrated with other circuits, especially digital control circuits. This thesis propose two kinds of silicon-substrate based MMIC(monolithic microwave integrated circuit) power amplifier for wireless communication system. First power amplifier is a X-band linear single-stage cascode power amplifier using an active bias circuit with an on-chip linearizer, which is developed in $0.25-\microm$ SiGe HBT BiCMOS process. The chip size of a single stage SiGe HBT power amplifier is 0.9mm x 0.95mm, including an active bias circuit with an on-chip linearizer, an input matching network, and an output matching network. The linearizer increases the 1dB compression point to as much as 3.4dB with no additional dc power consumption. A circuit simulation shows an increase of 1-dB compression point as much as 3.4dB, and a measurement indicate a 1-dB compression point only 0.4dB less than the saturation power with the linearizer. The power amplifier exhibits excellent input and output return loss characteristics. The fabricated PA delivers output P1dB of 20.8dBm, with a PAE of 27.4% and a small signal gain of 12.2dB with a gain variation under 0.5dB at 3.3V DC power supply over the operating frequency of 8.5GHz to 10.5GHz. Second power amplifier is a fully integrated compact Wideband Code Division Multiple Access(W-CDMA) and Worldwide Interoperability for Microwave Access(WiMAX) dual-band power amplifier for polar transmitter, which has been demonstrated in $0.18-\microm$ RF CMOS process. The proposed power amplifier is designed to satisfy the dual-band specification and reduce the chip size efficiently to...