(A) study on the variational formulation for the semiconductor device applications

Abstract

Variational formulation of Poisson``s equation with Boltzmann carrier statistics at quasi-equilibrium is introduced. This formulation allows us to find analytical solutions of the potential distribution in multi-dimensional semiconductor devices without resort to numerical calculation with resonably good accuracy. To demonstrate this approach, short-channel effects in the threshold voltage and subthreshold swing of fully depleted SOI MOSFET``s are analyzed. The usefulness of our idea is extended further to determine the quasi-fermi potential of the floating gate of an EEPROM device, which has been determine to be very difficult to find by the conventional methods. A novel high voltage junction termination structure of Coupled Floating Field Plate(CFFP) is also proposed. This structure has the advantages of more compatibility with modern planar integrated circuit fabrication process compared with field plate structure and stronger surface passivation capability compared with multiple field limiting ring structure. The numerical optimization is performed by the two dimensional device simulation with adopting variational method to determine floating field plate potentials. Our optimization example shows that about 80% of ideal plane junction breakdown voltage can be achieved for 1,130V device.