(A) study on automatic hardware synthesis from high-level description = 상위단계 표현으로부터의 하드웨어 자동합성에 관한 연구

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dc.contributor.advisorKyung, Jong-Min-
dc.contributor.authorPark, In-Cheol-
dc.description학위논문(박사) - 한국과학기술원 : 전기및 전자공학과, 1992.2, [ vii, 117, 4 p. ]-
dc.description.abstractThe hardware synthesis task is to take a specification of the behavior required of the hardware and a set of goals and constraints to be satisfied, and to find a register-transfer level structure that implements the behavior while meeting the goals and constraints. The hardware synthesis usually consists of several subtasks. The first task is the compilation of the high-level description into an internal representation. The core subtasks of transforming behavior into structure are the next three tasks: the scheduling which assigns operations into appropriate control steps, the data-path synthesis which allocates, binds and interconnects hardware resources, and the controller synthesis that drives the synthesized data-path part as implied by the behavioral description. In this theses, new approaches for the core parts of the hardware synthesis are presented. For the scheduling, we propose a new iterative heuristic algorithm having polynomial time complexity. One major feature is that it can escape from local minima and has a tendency to reach the globally optimal solution. Although there is no guarantee for the optimality, optimal results have been obtained for the experimental examples of the earlier works in a very short computation time. A graph model which contains information on the real-world constraints such as multi-cycle operations, chained operations and pipelined data-paths is also proposed as a general model on which our scheduling algorithm is based. For the data-path synthesis, we developed a new efficient binding algorithm grounded on hardware designer``s approaches. The problem of allocating minimal sufficient hardware resources such as registers and fuctional at units has been quite successfully solved by various earlier works. Compared to this, the problem of binding operations and variables to the allocated hardware resources such that total cost of interconnections is minimized is so difficult that exhaustive searching methods such as branch-...eng
dc.title(A) study on automatic hardware synthesis from high-level description = 상위단계 표현으로부터의 하드웨어 자동합성에 관한 연구-
dc.description.department한국과학기술원 : 전기및 전자공학과, -
dc.contributor.localauthorKyung, Jong-Min-
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