Unified random access memory with nanowire and energy band engineering

Abstract

It’s time for a paradigm shift in a silicon-based memory. $\It{‘Hwang’s Law’}$, the memory capacity doubling every year, has been the basis of 8-year technological and economic revolution by shrinking of transistors. Whether this size scaling has enabled the exponential growth in a semiconductor industry, it will eventually come to an end in the near future. The focus in the memory will have to shift to devices that are not just increasingly scalable but multi-functions supportable. As a technological breakthrough that can overcome the saturation in the revenue obtained from $\It{‘scaling’}$, a novel type of fusion memory is presented. Combined with a charge-trapping gate dielectric in a floating body transistor, functions of a non-volatile flash memory and high-speed capacitorless 1T-DRAM are integrated in a single memory transistor. The memory named $\underbar{U}nified \underbar{R}andom \underbar{A}ccess \underbar{M}emory$ (URAM) could radically improve the performance of embedded system without shrinking memory cells, and the paradigm shift from $\It{‘scaling’}$ to $\It{‘multi-function’}$ will create new value and continue the evolution of silicon memory technology. In the end, URAM will in turn become the cornerstone of new silicon-based memory that operates versatile functions of high-speed mode and non-volatile mode according to the end user’s demand.