(A) low power programmable 3D graphics processor with fixed-point SIMD vertex shader고정 소수점 SIMD Vertex Shader를 이용한 저전력 프로그래머블 3D 그래픽스 프로세서

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 558
  • Download : 0
DC FieldValueLanguage
dc.contributor.advisorYoo, Hoi-Jun-
dc.contributor.advisor유회준-
dc.contributor.authorSohn, Ju-Ho-
dc.contributor.author손주호-
dc.date.accessioned2011-12-14-
dc.date.available2011-12-14-
dc.date.issued2006-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=258148&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/35379-
dc.description학위논문(박사) - 한국과학기술원 : 전기및전자공학전공, 2006.8, [ iii, 99 p. ]-
dc.description.abstractThe real time 3D graphics becomes the most attractive application for mobile terminals, in which the battery lifetime and small computing power, however, limit the system resources and memory bandwidth for graphics processing. Besides, since users watch graphics images on a small screen very closely to their eyes, recent mobile 3D graphics are introducing the programmability in both hardware and software for more advanced functionality while achieving low power consumption. In this research, I designed and implemented a programmable graphics processor with fixed-point vertex shader for mobile applications. The proposed architecture has four major features: separation of data transfer flow, full hardware accelerations with stream processing, two level extensions of instruction set architectures, and fixed-point single-instruction-multiple-data (SIMD) processing. The graphics processor contains an ARM10 compatible 32-bit RISC processor, a 128-bit programmable fixed-point SIMD vertex shader, a low power rendering engine with 26kB dedicated graphics cache, and a programmable frequency synthesizer (PFS). Different from conventional graphics hardware, the proposed graphics processor implements ARM10 coprocessor architecture with dual operations so that user-programmable vertex shading is possible for advanced graphics algorithms and various streaming multimedia processing in mobile applications. The circuits and architecture of the graphics processor are optimized for fixed-point operations and achieve the low power consumption with help of instruction-level power management of the vertex shader and pixel-level clock gating of the rendering engine. The PFS with a fully balanced voltage-controlled oscillator (VCO) controls the clock frequency from 8MHz to 200MHz continuously and adaptively for low power modes by software. The $36mm^2$ chip shows 50Mvertices/s and 200Mtexels/s peak graphics performance, dissipating 155mW in 0.18㎛ 6-metal standard CMOS logic process. Fo...eng
dc.languageeng-
dc.publisher한국과학기술원-
dc.subjectLow power-
dc.subjectFixed-point-
dc.subjectSIMD-
dc.subjectGraphics Processor-
dc.subjectStream Processing-
dc.subject스트림 처리-
dc.subject저전력-
dc.subject고정소수점 연산-
dc.subject그래픽스 프로세서-
dc.subjectDigital VLSI-
dc.subjectArchitecture-
dc.title(A) low power programmable 3D graphics processor with fixed-point SIMD vertex shader-
dc.title.alternative고정 소수점 SIMD Vertex Shader를 이용한 저전력 프로그래머블 3D 그래픽스 프로세서-
dc.typeThesis(Ph.D)-
dc.identifier.CNRN258148/325007 -
dc.description.department한국과학기술원 : 전기및전자공학전공, -
dc.identifier.uid020035146-
dc.contributor.localauthorYoo, Hoi-Jun-
dc.contributor.localauthor유회준-
Appears in Collection
EE-Theses_Ph.D.(박사논문)
Files in This Item
There are no files associated with this item.

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0