Adaptive tessellation of PN triangles using minimum-artifact edge linking최소 결함 에지 연결을 이용한 PN Triangle의 적응 모자이크 기법

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In 3D graphics, the PN triangle method improves visual quality and has a great significance in processing tessellation at the hardware level without software assistance. Processing tessellation at the hardware level, this method turns out to be a solution to a memory bandwidth bottleneck which is a persistent problem in 3D graphics. Despite its significance, however, the conventional PN triangle method has certain defects such as inefficient GE operation and degradation of visual quality. Because the method tessellates a curved surface according to the user-defined fixed LOD (Level Of Detail). In this thesis, we propose adaptive tessellation of PN triangles using minimum-artifact edge linking. The adaptive tessellation of PN triangles is based on adaptive LOD. Adaptive LOD is used to depict triangles in different detail according to the size of the triangles. This adaptivity results in higher efficiency of tessellation. Adaptive LOD should be decided only by the characteristic of an edge to avoid edge cracking on the sharing edge between neighbor triangles. In this thesis, the adaptive LOD uses the edge LOD, which is decided according to the length of an edge. After deciding the edge LOD, the triangle is divided into inner triangle and outer triangle. The inner triangle is tessellated based on the maximum edge LOD among three edge LOD values of a triangle. The next step is to link the edges between the inner triangle and the outer triangle. The conventional edge linking method gives rise to the problem of artifacts by long edges. However, the proposed minimum-artifact edge linking removes the artifacts by long edges, resulting in better quality of scene. Consequently, through adaptive tessellation of PN triangles using minimum-artifact edge linking, higher efficiency of tessellation and better quality of scene are obtained by adaptivity and minimum-artifact edge linking, respectively. This thesis also presents a hardware architecture of a PN triangle method usi...
Advisors
Kim, Lee-Supresearcher김이섭researcher
Description
한국과학기술원 : 전기및전자공학전공,
Publisher
한국과학기술원
Issue Date
2005
Identifier
245056/325007  / 000985385
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기및전자공학전공, 2005.2, [ xi, 91 p. ]

Keywords

edge linking; adaptive tessellation; 3D Graphics; hardware architecture; CTA; Digital Subtraction; Blood vessel extraction; Mutual information; Registration

URI
http://hdl.handle.net/10203/35290
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=245056&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
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