학위논문(박사) - 한국과학기술원 : 전기및전자공학전공, 2004.8, [ x, 130 p. ]
HIGH-LEVEL SYNTHESIS; RTL DEBUGGING; EMULATION PLATFORM; SOC DESIGN METHODOLOGY; C TO HARDWARE TRANSLATION; C-Hardware 변환차분법; 상위수준합성; RTL 디버깅; 에뮤레이션 환경; SoC 설계 방법론
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