Development of passive devices on silicon substrate for microwave application실리콘 기판을 이용한 초고주파용 수동소자의 개발

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In this these, passive devices such as transmission line and spiral inductor are developed on CMOS grade silicon substrate for microwave application. In chapter 2, Passive devices on membrane supported by porous silicon post were fabricated and measured. The porous silicon layer was obtained from <100> boron doped silicon substrate of 8 -12Ωcm resistivity by anodization process. The porous silicon layer is 40um thick, and it is the height from the etched silicon surface to the membrane. After the selectively poroused silicon layer is prepared, the dielectrics $(SiO_2/SiNx/SiO_2)$ for membrane is deposited with PECVD and RPCVD. The deposition of dielectric is followed by manufacturing of coplanar waveguide with conventional MMIC process, lithography, metal evaporation, lift off and gold plating or something, where NiCr/Au or Ti/Au were used in the metalization process. After that, the membrane dielectric is patterned and etched by RIE to fit to coplanar waveguide size for NaOH solution to permeate though the open area and etch porous silicon sacrificial layer rapidly. Finally, the porous silicon sacrificial layer is etched in 0.5% NaOH solution for 2 hours without any protecting mask for metals, the etching rate is higher than 2.5um/min. From this process, spiral inductor and coplanar waveguide were fabricated on membrane and the longest one is 5mm long. Maximum available gain of coplanar waveguide has been improved from -1.2dB/mm at 15GHz to higher than -0.3dB/mm up to 40GHz by adopting porous silicon post rather than silicon post and also improved from -0.59dB/mm at 40GHz to higher than -0.3dB/mm at the same frequency by etching the porous silicon layer under the signal line. The CPW separated by 100um from the silicon substrate has the maximum available gain of larger than -0.2dB/mm up to 40GHz. In this case, the simulation result shows that the dominant part of the signal loss is not the dielectric loss in the silicon substrate but the combination of the di...
Advisors
Kwon, Young-Seresearcher권영세researcher
Description
한국과학기술원 : 전기및전자공학전공,
Publisher
한국과학기술원
Issue Date
2003
Identifier
231771/325007  / 000995012
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기및전자공학전공, 2003.8, [ vi, 108 p. ]

Keywords

polymer film; membrane; Passive device; Silicon substrate; microshield transmission line; 차폐 신호선; 폴리머 필름; 박막; 수동소자; 실리콘 기판

URI
http://hdl.handle.net/10203/35193
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=231771&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
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