Performance issues in packet switches for ATM networksATM 망을 위한 패킷 스위치의 성능 이슈

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dc.contributor.advisorCho, Jung-Wan-
dc.contributor.advisor조정완-
dc.contributor.authorKim, Byung-Ho-
dc.contributor.author김병호-
dc.date.accessioned2011-12-13T05:24:05Z-
dc.date.available2011-12-13T05:24:05Z-
dc.date.issued1997-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=114164&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/33082-
dc.description학위논문(박사) - 한국과학기술원 : 전산학과, 1997.2, [ ix, 86 p. ]-
dc.description.abstractIn the 1990s, significant advances in switching technology have precipitated the current explosion in the amount of research in future high-speed networks. The concept of an integrated communication system that can support a diversity of services with different requirements introduces the broadband integrated services digital network (B-ISDN). The network should be responsive to interactive traffic, providing high bandwidth for file transfer, high speed data, and video applications, and having a low delay for real time communications such as the packet voice. As the transport and switching mechanism for today``s B-ISDN, asynchronous transfer mode (ATM) has been widely accepted and standardized as the basis for B-ISDN. Many researches in the area of ATM networks have been done such as quality of service (QOS) support, flow control, and packet switching systems. In particular, the packet switching systems have been focused as the main component of ATM network and a number of switch architectures have been proposed and analyzed. The objective of this dissertation is to provide an integrated view on the packet switching systems for future ATM networks not only concerning on the design of switch architectures but also performance issues of the switching systems. In order to better understand the influence of the switch performance on the ATM network, we introduce a fundamental notion of the {\em output traffic distribution}, which is the packet arrival pattern on each output link connecting a given output module and the multipath switching network. We first study the relationship between the performance of output buffer and the different multipath switch architectures. For this, we develop an analytical model to evaluate the behaviour of the output buffer in output queueing ATM switches focusing on the output traffic distributions. We analyze quantitatively, through the analytical model, that the performances of the output buffer are differentiated according to the ...eng
dc.languageeng-
dc.publisher한국과학기술원-
dc.titlePerformance issues in packet switches for ATM networks-
dc.title.alternativeATM 망을 위한 패킷 스위치의 성능 이슈-
dc.typeThesis(Ph.D)-
dc.identifier.CNRN114164/325007-
dc.description.department한국과학기술원 : 전산학과, -
dc.identifier.uid000925051-
dc.contributor.localauthorCho, Jung-Wan-
dc.contributor.localauthor조정완-
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CS-Theses_Ph.D.(박사논문)
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