Enhancing the performance of strict consistency models with delaying coherence requests

Abstract

Advances in ILP techniques enable strict consistency models to relax memory order through speculative execution of memory operations. However, ordering constraints still hinder the performance because speculatively executed operations cannot be committed out of program order for the possibility of mis-speculation. In this dissertation, we propose a new technique, the request reorder buffer (RRB) technique, which allows memory operations to be non-speculatively committed out of order without violating consistency constraints. Though memory operations are committed out of order, it does not violate consistency constraints because the RRB technique prohibits other processors to observe the out-of-order execution through delaying coherence requests. To avoid deadlock due to delaying coherence requests, we selectively commit operations based on the target address of the committed memory operations. Proposed deadlock avoidance condition provides simple but effective way to guarantee forward progress. The RRB technique can also be used to improve the performance of spinlocks such as TTS lock or MCS lock. When there is contention for a lock, the efficiency of locking primitives is degraded for the unnecessary cache invalidation due to the early acquires. In this dissertation, we show that the negative impact of early acquires for a contended lock can be alleviated through delaying coherence requests.