Etched profiles of SiO2 Layer
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Oh, Se-Ho | ko |
| dc.contributor.author | Choi, Yearn-Ik | ko |
| dc.contributor.author | Kwon, Young Se | ko |
| dc.contributor.author | Kim, Choong Ki | ko |
| dc.date.accessioned | 2008-02-26T09:02:35Z | - |
| dc.date.available | 2008-02-26T09:02:35Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 1981-03 | - |
| dc.identifier.citation | ELECTRONICS LETTERS, v.17 | - |
| dc.identifier.issn | 0013-5194 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/3202 | - |
| dc.description.abstract | Etched-edge profile equations of SiO2 in a double layer of fast- and slow-etching SiO2 layer have been derived using Fermat's principle of least time. Etched profiles obtained from the SEM (scanning electron microscope) micrographs for experimental samples show reasonable agreement with calculated profiles. | - |
| dc.language | English | - |
| dc.language.iso | en_US | en |
| dc.publisher | Inst Engineering Technology-Iet | - |
| dc.title | Etched profiles of SiO2 Layer | - |
| dc.type | Article | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 17 | - |
| dc.citation.publicationname | ELECTRONICS LETTERS | - |
| dc.embargo.liftdate | 9999-12-31 | - |
| dc.embargo.terms | 9999-12-31 | - |
| dc.contributor.localauthor | Kwon, Young Se | - |
| dc.contributor.nonIdAuthor | Oh, Se-Ho | - |
| dc.contributor.nonIdAuthor | Choi, Yearn-Ik | - |
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