MAC-DO: Multi-bit analog in-memory accelerator compatible with DRAM using output stationary아웃풋 스테이셔너리를 이용한 디램 기반의 다중비트 아날로그 인메모리 가속기

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This paper presents an analog accelerator in-memory (AiM) architecture named MAC-DO which is compatible with modern DRAM technology. Compared to previous analog accelerators, MAC-DO has four key benefits. First, MAC-DO supports multi-bit input and weight precision for multiply-accumulate (MAC) operations. Secondly, MAC-DO is compatible with current 1T1C DRAM technology without any modifications of a DRAM cell and array. Third, MAC-DO makes all DRAM cells participate in MAC computations without idle cells during a MAC operation cycle by using output stationary mapping, which leads to the improvement of throughput and energy efficiency. Fourth, MAC-DO uses charge stored in capacitors to compute MAC operations instead of current, and it improves the linearity of MAC operations.
Advisors
Jung, Wanyeongresearcher정완영researcher
Description
한국과학기술원 :전기및전자공학부,
Publisher
한국과학기술원
Issue Date
2022
Identifier
325007
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기및전자공학부, 2022.2,[iv, 32 p. :]

Keywords

Artificial intelligence▼aanalog computing▼aDRAM▼aarchitecture▼aaccelerator; 인공지능▼a아날로그 컴퓨팅▼a디램▼a아키텍쳐▼a가속기

URI
http://hdl.handle.net/10203/310038
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=1021046&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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